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Samsung Plans to Introduce 2nm Base Die in HBM5 Memory, Speed Over 50% Higher Than HBM4E

Published: Source: ITHOME (RSS)

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Samsung Electronics has confirmed plans to apply a 2nm base die in the HBM5 generation, with operating speeds expected to be over 50% higher than HBM4E. The memory stack chooses the 2nm process to achieve significant improvements in performance and energy efficiency, and the base die will support higher-density through-silicon vias (TSV). Previously, Samsung's HBM4 and HBM4E were equipped with 4nm base dies, with HBM4E achieving 14+ Gbps high-speed operation through high-density devices.

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